By Ibrahim (Abe) M. Elfadel, Gerhard Fettweis
This ebook explains for readers how 3D chip stacks promise to extend the extent of on-chip integration, and to layout new heterogeneous semiconductor units that mix chips of other integration applied sciences (incl. sensors) in one package deal of the smallest attainable dimension. The authors specialise in heterogeneous 3D integration, addressing essentially the most vital demanding situations during this rising know-how, together with contactless, optics-based, and carbon-nanotube-based 3D integration, in addition to signal-integrity and thermal administration matters in copper-based 3D integration. assurance additionally comprises the 3D heterogeneous integration of energy assets, photonic units, and non-volatile stories in response to new fabrics systems.
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Additional resources for 3D Stacked Chips: From Emerging Processes to Heterogeneous Systems
40–42 11. M. Ritala, M. S. Nalwa, Handbook of Thin Film Materials, vol. 1, Chap. 2 (Academic, San Diego, 2001), p. 103 12. K. H. H. S. Hwang, Investigation on the growth initiation of Ru thin films by atomic layer deposition. Chem. Mater. 22(9), 2850–2856 (2010) 13. M. Leskelä, M. Ritala, Atomic layer deposition (ALD): from precursors to thin film structures. Thin Solid Films 409(1), 138–146 (2002) 14. M. George, Atomic layer deposition: an overview. Chem. Rev. 110(1), 111–131 (2009) 15. K. Schroder, Semiconductor Material and Device Characterization (Wiley, New York, 2006) 16.
Killge ( ) • V. W. M. Elfadel, G. 1007/978-3-319-20481-9_2 9 10 S. Killge et al. Fig. 1 TSV process scheme for thinned wafer with a thermal oxide layer as rear side etch-resist 2. 3. 4. 5. 6. 7. 1 the subsequent deep reactive ion etch process1 and a full lithography step is performed to create a photoresist masking layer for the subsequent deep reactive ion etch process. The TSVs are formed by means of deep reactive ion etching. The photoresist and the polymeric sidewall passivation layers created during DRIE processing are stripped wet-chemically.
22 S. Killge et al. Fig. 14 Examples for an insulator—diffusion barrier- and seed-layer film stack in a TSV with a 20:1 aspect ratio. ALD films blue: insulator 100 nm Al2 O3 ; ALD films green: barrier 32 nm TaN; ALD films red: seed 33 nm Ru; (TSV-diameter = 5 m depth 130 m , details: sidewall top, sidewall bottom)  In this case the nucleation of the seed layer takes place by island formation. Both aspects hamper the formation of closed ultra thin layers. In the following we present an ALD film stack for a high aspect ratio copperbased TSV.